B/ Digital Signal Processing Block (DSPB)

From RFID Wiki

The options we have for this part are:

  • Leave it as it is with V3, e.g. keep the PXA270 to do baseband processing and the FPGA to handle the analog front end.
  • Take the PXA270 out and replace it with a less powerfull processor to save cost, and leave the FPGA in place.
  • Take out both PXA270 processor and FPGA and subtitute both with a larger FPGA on which we run a softcore processor see wiki
  • ... (if you have anything to add put it here)

[edit] Serge's opinion

I vote for the third one (big FPGA with softcore processor) because of the following:

  • It will lead us to a one-chip-with-some-small-external-components solution.
  • Softcores are easy to find (both proprietary and opensource)
  • Computing intensive tasks can be offloaded to hardware (relaxes the computing requirments of the softcore)
  • Fully customizable by the end user, if he/she needs another processor/demodulator, etc.
  • We could move the usb to computer connection into the FPGA (saves a chip hence we need less boardspace)
  • We could customize the processor where needed (i.e. add instructions we need, remove instructions we do not need in order to save space)
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